EDN

How to Read Data Sheets: Logic Timing

In this column, we take a closer look as to how timing and delays affect our logic circuits. As part of this, we start to consider the timing diagrams presented in data sheets. As I was writing my ...
EDN

How to Read Data Sheets: Logic Timing (Part 2, Latches)

Who would have thought that a circuit comprising only two 2-input NAND gates could be so complicated (or, should we say, “interesting”)? Up to this point (click here to see my earlier columns), the ...
Nature

High-Precision Timing Generators And Delay Circuits

High-precision timing generators and delay circuits form a critical backbone in modern electronics, enabling precise control and synchronisation in applications ranging from advanced instrumentation ...
Design-Reuse

Preservation of Circuit Structure and Timing during Fault Emulation in FPGA

This paper presents a technique that allows to preserve structure of a circuit according to a target technology during fault emulation in FPGA. The technique is not restricted to any target technology ...
Electronic Design

Designer Decisions: Selecting Timing Circuits For Modern Communications

Modern timing architectures used in next-generation networking and wireless infrastructure applications have become increasingly complex. Some of the reasons for the shift include the need to support ...